Samsung 512Mb C-die DDR SDRAM Constructional Analysis
This report contains a microstructural analysis of the memory cell and peripheral circuits. Plan-view (P-V) and cross-sectional (X-S) SEM, TEM were conducted to reveal the circuit layout and material architecture of the devices. SIMS (Secondary Ion Mass Spectrometry) was used to determine the doping profiles of device formation. The report also contains the package and die photographs, showing the segments of cell array, word line decoder, sense amplifier, I/O circuits, and peripheral circuits.
Intel Pentium D processor 955 Constructional Analysis
Plan-view (P-V) and cross-sectional (X-S) SEM, TEM microscopy were conducted to reveal the circuit layout and material architecture of the devices. TEM / EDX analysis were conducted to analyze the constituent of the key regions. SIMS (Secondary Ion Mass Spectrometry) was used to determine the doping profiles of device formation. It contains a microstructure analysis in terms of process technology. The process features were shown as follows.
Two IC chips were found of the same size in the package
The IC architecture was characterized by a 8-level metal, Cu damascene, process. [39.6 nm gate length and 16 ? gate oxide]
W-plug, followed by a global CMP planarization, was conducted as the first level metal contact
Recessed S/D was shown to be resulted from spacer etch
In some region of the chip, selective Si-Ge epitaxial growth was made on active area, where the thickness of epitaxial layer was about 931 ?
Carbon containing Low-K oxide was found in ILD and IMD layers
|Appearance, Dimension Measurement||Optical profiler, OM, SEM|
|Lead Frame Condition||X-ray, SEM|
|Defect Isolation||EMMI, OBIRCH|
|Failure Analysis||X-ray, SAT, Optical profiler, SEM, TEM|
|Composition Analysis||SEM/EDS, TEM/EDS, FE-AES, XPS, SIMS|
|ESD Testing||HBM, MM, CDM, Latch-up|